Match each weight/activation quant regime to its mechanism and best-fit workload
W8A8 quantizes weights and activations to INT8 for compute-bound prefill on INT8 tensor cores; W4A16 shrinks only the weight read to 4-bit for bandwidth-bound decode.
Imagine a kitchen with two very different rushes. The lunch rush sends hundreds of identical orders at once, so the bottleneck is how fast the cooks can chop. You hire faster cooks who work in a coarser, quicker style. That is W8A8: everything runs in a faster, lower-precision mode because raw cooking speed is the limit. The late-night rush sends one order at a time, and the bottleneck is the long walk to the pantry for ingredients. You shrink the ingredients so each trip carries less weight. That is W4A16: you compress only what you fetch from storage, but cook it carefully in full precision. Same kitchen, two regimes, each matched to where the real wait is.
Detailed answer & concept explanation~7 min readEverything you need to truly understand this topic: intuition, mechanics, step by step explanation, code, formulas, and worked example. Click to expand.
Everything you need to truly understand this topic: intuition, mechanics, step by step explanation, code, formulas, and worked example. Click to expand.
Everything you need to truly understand this topic: intuition, mechanics, step by step explanation, code, formulas, and worked example.
Everything important, quickly.
4 min: roofline framing (compute vs bandwidth) + W8A8 INT8 math for prefill + W4A16 weight-only read for decode + SmoothQuant vs AWQ/GPTQ + batch-size crossover.
| Aspect | W8A8 | W4A16 |
|---|---|---|
| Weight bits | 8 (INT8) | 4 (INT4) |
| Activation bits | 8 (INT8) | 16 (FP16) |
| Matmul precision | INT8 tensor cores | FP16 (weights dequantized first) |
| Primary win | 2x math throughput | 4x smaller weight read |
| Bottleneck it relieves | Compute-bound | Memory-bandwidth-bound |
| Best-fit phase | Prefill, large-batch serving | Decode at small batch |
| Canonical method | SmoothQuant | AWQ, GPTQ |
Real products, models, and research that use this idea.
- vLLM and SGLang in 2026 ship AWQ and GPTQ W4A16 kernels as the default for low-batch decode of Llama 4 and Qwen 3.
- TensorRT-LLM (NVIDIA) exposes SmoothQuant W8A8 INT8 GEMMs tuned for compute-bound prefill on H100 and B200.
- NVIDIA B200 hardware adds native FP4 tensor cores, pushing W4A4 and W4A8 mixed regimes into production serving.
- DeepSeek V4 and Mistral Large 3 publish AWQ-quantized W4A16 checkpoints sized for single-GPU 4-bit decode.
- Hugging Face's compressed-tensors and llm-compressor toolkits export both SmoothQuant W8A8 and GPTQ W4A16 from one model.
What an interviewer would ask next. Try answering before peeking at the approach.
QWhy does W4A16 give zero matmul speedup despite using 4-bit weights?
QAt what batch size does decode flip from bandwidth-bound to compute-bound?
QWhy are activations harder to quantize to INT8 than weights?
Don't say thisRed flags and common mistakes that signal junior thinking. Click to expand.
Red flags and common mistakes that signal junior thinking. Click to expand.
Treating all quantization as one knob. The phase decides: prefill is compute-bound and wants INT8 math, decode is bandwidth-bound and wants the smallest weight read, regardless of compute precision.
The night-before-the-interview bullets. Scan these on the way to the call.
Primary sources. Skim if you want the original framing.
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